Over eleven years ago, scientist and quantum engineer Seth Lloyd, discussed the future development of microprocessors with Wired magazine.
Unsurprisingly, the field of quantum computing has grown by leaps and bounds since his interview. In fact, there were approximately 6 people working in the field back in March of 1995, versus today, where the interdisciplinary industry is comprised of hundreds of researchers and billion dollar budgets.
And while quantum computing is the topic du jour, I was and am more curious to know what the actual development in the x86 architecture has been since the mid ’90s? Is there a valid comparison between today’s chips and those created many moons ago?
I started sifting through old press releases, CPU reviews and datasheets to put together some kind of direct comparison between what was being sold in 1995 and what is on the market today.
Unfortunately, the evolution of the microprocessor has been in such a way that it is akin to comparing apples and oranges. Not only do you have different superscalar designs (which involve many more stages to the pipeline), but you have different types of RAM, bus speeds and a slew of other variables that change the overall performance of a computer.
The Wired article was published in March of 1995. Intel released the Pentium 120 Mhz chip on March 27, 1995 at which point it was “top-of-the-line.” Here are some numbers of interest:
- It consumed 10 Watts
- Performed roughly 200 MIPS (140 SPECint92 and 103 SPECfp92)
- Its transistors were fabricated on a .35 micron process (350 nm)
- Cost $935, when bought in batches of 1,000 (source)
- 3.3 million transistors
- 90 mm² die size
- 16K L1 cache on-die
- 256K L2 cache on motherboard
- Produced on wafer size of 200 mm²
- 5 metal layers
- Aluminum (AL) interconnects
It was considered top of the line for its time, as the Pentium Pro line had yet to be released.
Over the past decade, Intel has created several different chips for various markets (e.g., mobile, embedded, server, desktop). And since we are trying to compare the Crème-de-la-Crème, the new Xeon “Tulsa” chip has the following specs:
- Dual-Core Xeon, each core operates at 3400 mhz
- 24 K + 32 K L1 cache on-die (trace and data)
- 2 × 1024 K L2 cache on-die
- 16384 K L3 cache on-die
- Consumes 150 Watts (rack-mounted model consumes 95 watts)
- 424 mm² die size
- 1.3 billion transistors
- Transistors fabricated on a 65 nm process
- Produced on wafer size of 300 mm²
- 8 metal layers
- Copper (CU) interconnects
The Xeon Tulsa actually won’t be released for another few days, so an official price has not be issued. However, gauging on Pricewatch numbers, its predecessor (Dempsey) is selling for $800. So $1000 is probably a good ball park to guesstimate.
Furthermore, the only benchmarks I have found thus far is that it will perform about 70 percent higher in the TPC-C test than its predecessors (320,000 versus 188,000 transactions per minute).
I posted a query on Usenet to see if anyone has details regarding its theoretical FLOPS and MIPS, and will post the responses when they arrive.
So are we living in an era of Lloyd’s “Million Megahertz” processor? Nope, but it is getting there.
See my previous post on the human brain, FLOPS, MIPS, and Watts. Be sure to also check out Geordie Rose’s blog as well as “Programming the Universe” by Seth Lloyd.