Yesterday, Intel announced that it plans on commercializing an 80-core, 1-teraflop general purpose chip.
While that will probably be technically feasible, there are a couple of problems that need to be addressed first.
Number one, programs must be rewritten and fined-tuned to take advantage of the parallel nature of these cores. And as we have seen with support for multiple processors in a single system, this development is often times resource intensive, time-consuming, and arduous. In fact, the highly sophisticated XBox 360, which is powered by 3 cores, has few titles that are truly optimized for these paper numbers. [See also the development of SIMD as well as HyperThreading]
Which brings us to the second point which was best annunciated by Tom Yager of InfoWorld: just because the CPU can crunch those operations and instructions does not mean that real-world usage will see this system throughput. In fact, Intel is actually taking a step backwards in its architectural approach to bus bandwidth allocation and usage with its newly touted 4-core system.
As shown in AMD’s recent K8L presentation in Moscow (sure you can call it bias, but numbers don’t lie), the stop-gap, duct-tape solution Intel has glued together in its quad-core offering will result in a double-digit loss in effective bus bandwidth. So even if each core is capable of processing ginormous amounts of raw data, accessing memory and other I/O devices is severely limited.
Think of a system bus as a water pipe at a cook out. A small lawn fire breaks out and you, as Intel, have access to hundreds of gallons of water, but your pipe is itty bitty, and thus you are ability to put out a small fire is hampered. And as a result, you burn up your neighbors lawn gnomes and no one invites you over for Christmas.
AMD’s solution to this was to create a new topology from scratch called HyperTransport, that can handle larger amounts of data rates. They also have integrated the actual cores and memory controllers onto a single die.
In closing, it should be noted that according to CNet, Intel is also working on a new transportation system called Common System Interface which should solve several of the problems plaguing its current generation of front-side bus chipsets. They are also working on “Geneseo” which will allow 3rd parties to integrate chips directly onto the system bus.
See also: System-on-a-Chip