9/9/2007

What is wrong with Moore’s Law?

Filed under: Debate, Technology — Tim @ 6:59 am

moore.jpgIn a quick nutshell, Moore’s Law suggests that the number of transistors crammed into a CPU doubles every 18-24 months. This adage has arguably become a self-fulfilling prophecy and is typically cited by many industry observers as a barometer for continued leaps in processor performance.

However, this is the classic example of correlation being conflated with causation. And it is somewhat frustrating to read accounts by media outlets gushingly laud “billions of transistors” as if that is inherently a good thing. The truth is transistor count is agnostic in terms of actual performance, or rather it is an inconsequential variable (i.e., not all transistors are utilized equally).

For instance, in the past, various auto-manufactures have marketed horse power as the standard of performance. But more HP does not necessarily equate to faster quarter-mile speeds or better fuel consumption. Or to put it another way, this would be equivalent to suggesting that the more a car weighs the faster it is. The heavier the engine, the faster it will go.

And to the chagrin of the Chicago ad agencies, these claims are simply false rhetoric.

Barometer schmerometer

German-engineered vehicles are famous in part for the relatively small, yet powerful engines. This development was spurred in part by the government, which for decades has levied a taxation on engine block sizes — due to the erroneous belief that the wealthier you are, the bigger engine you can buy — it is a tax specifically targeted at “eating the rich” who are thought to create more pollution (the Bundestag is now looking at taxing emissions instead of block sizes). Furthermore, Japanese and Italian motorworks are also notorious for their high-performance relative to their low-mass due to widespread use of special, light-weight composites and alloys.

azlk2141.jpgThis mass-based tomfoolery was taken to the opposite extreme in the Eastern bloc, when state-controlled car manufactures were managed under a quota system. And the “heavier is better” philosophy underlying the quota directed companies such as AZLK to create some of the heaviest yet most uncomfortable and unreliable cars ever.

Heavier than air

There are countless counterexamples exposing this flaw, after all, how do you measure performance between heavier airplanes like the A380 versus a nimble F-22? Is speed or cargo room the most important? (I wouldn’t put it past the defense industry to construct heavy, but useless aircraft).

The problem with looking at transistors as the leading contributor of performance is that merely adding more transistors does not automatically cause better performance. In fact, it could theoretically have just the opposite effect as seen with the original Itanium.

Unfortunately transistor counts wholly ignores the multitude of hardware design variables that have contributed to todays breakneck speeds, such as out-of-order execution, SIMD parallelization, on-die caches and SMT (not to mention software written to take advantage of these developments).

For years, one of the pillars in the RISC versus CISC debate was in part over how many stages an optimum pipeline needed to be: 5, 10, 15, 20? And at various times the actual performance crown (measured by SPEC scores), flipped back and forth between design camps (Alpha’s versus Pentium Pro’s comes to mind). Thus raising the question, is more better? If yes, why not create a 1000 stage pipeline?

A microscopic balancing act

For instance, the original Pentium had a 5-stage pipeline, the Pentium Pro had 14, the Pentium III had 10, the original Pentium 4 (the first to use the NetBurst architecture) had 20, and Prescott (the last P4 NetBurst revision) had 31 stages. [As a RISC comparison, the original G4 used by Apple had a 4 stages, the G4e had 7, and the G5 had 10 stages]

intel_core_2_duo.jpgDuring the development of these chips, two of the leading factors the designers had to juggle was throttling instructions-per-cycle and power management (watts consumed). And the resulting tradeoff found in the current Core architecture underlying the latest Intel chips: it has a mere 14 stages (inherited in part from the 12/14 from the Pentium M). [Note: BeHardware has one of the easier to understand write-ups on the pipeline evolution from NetBurst to the current Core]

Pipeline stages have not been the only battle ground either. During the height of the megahertz wars, both AMD and Apple went to great lengths to disspell the notion that “more is faster.” And guess what? It turns out that not all megahertz are created equal: “The Megathertz myth.”

Ultimately focusing on trillions of transistors misses the bigger picture, because it wholly ignores the flow electrons will actually travel and how they are productively utilized while they zig and zag.

Historicism in action

I would argue that FLOPS and MIPS are a much better indicator of real-world performance than that of Moore’s Law. It is no surprise then, that the fastest supercomputers (Top 500) are not measured based on the collective amount of transistors they are comprised of, but rather, the LINPACK metric which establishes performance numbers measured in FLOPS. Furthermore, when a new CPU is introduced, the designers typically use the tests created by the SPEC board, which measure performance based on mathematical calculations — not transistor counts — to benchmark their “true” performance.

In the end, what journalists and industry observers should do to measure performance trends is plot points on their affectionate charts and graphs detailing FLOPS and MIPS… in terms of dollars and watts. Kind of like the Big Mac Index published by The Economist.

As it stands right now, Moore’s Law is not a measure of performance and merely stands as a testament to extreme miniaturization (barring benchmarks, for all we know no performance increases have occurred).

See also:
FLOPS, MIPS, Watts and the Human Brain
Seth Lloyd’s Million Megahertz CPU
Specialization, Centralization, and the Future of Chip Integration
A Belated Farewell to the DEC Alpha

Time Elapsed Photos from the East

Filed under: Culture, Economics — Tim @ 3:04 am

Here is one of the more interesting compilations of construction photos in Shinjuku (Tokyo) taken over the course of 35 years.

As an added bonus, below are two pictures of Dubai (UAE). The first is from 1991, the other is 2005.
dubai1.jpgdubai2.jpg